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| N-CHANNEL 100V - 0.009 - 140A MAX247TM MESH OVERLAYTM POWER MOSFET TYPE STY140NS10 s s s STY140NS10 VDSS 100V RDS(on) <0.011 ID 140A TYPICAL RDS(on) = 0.009 STANDARD THRESHOLD DRIVE 100% AVALANCHE TESTED DESCRIPTION Using the latest high voltage MESH OVERLAYTM process, STMicroelectronics has designed an advanced family of power MOSFETs with outstanding performances. The new patent pending strip layout coupled with the Company's proprietary edge termination structure, gives the lowest RDS(on) per area, exceptional avalanche and dv/dt capabilities and unrivalled gate charge and switching characteristics. 2 1 3 Max247TM INTERNAL SCHEMATIC DIAGRAM APPLICATIONS s HIGH CURRENT, HIGH SWITCHING SPEED s SWITCH MODE POWER SUPPLY (SMPS) ABSOLUTE MAXIMUM RATINGS Symbol VDS VDGR VGS ID ID IDM(*) Ptot EAS(1) dv/dt (2) Tstg Tj Parameter Drain-source Voltage (VGS = 0) Drain-gate Voltage (RGS = 20 k) Gate- source Voltage Drain Current (continuos) at TC = 25C Drain Current (continuos) at TC = 100C Drain Current (pulsed) Total Dissipation at TC = 25C Derating Factor Single Pulse Avalanche Energy Peak Diode Recovery voltage slope Storage Temperature Operating Junction Temperature Value 100 100 20 140 99 560 450 3 2900 5 -55 to 175 -55 to 175 Unit V V V A A A W W/C mJ V/ns C C (*) Pulse width limited by safe operating area. August 2001 . (1) Starting T j = 25 oC, ID = 70A, VDD= 50V (2) ISD 140A, di/dt 200A/s, VDD V (BR)DSS, T j TJMAX. 1/8 STY140NS10 THERMAL DATA Rthj-case Rthj-amb Tj Thermal Resistance Junction-case Thermal Resistance Junction-ambient Maximum Lead Temperature For Soldering Purpose Max Max Typ 0.33 30 300 C/W C/W C ELECTRICAL CHARACTERISTICS (Tcase = 25 C unless otherwise specified) OFF Symbol V(BR)DSS IDSS IGSS Parameter Drain-source Breakdown Voltage Zero Gate Voltage Drain Current (VGS = 0) Gate-body Leakage Current (VDS = 0) Test Conditions ID = 250 A, VGS = 0 VDS = Max Rating VDS = Max Rating TC = 125C VGS = 20V Min. 100 1 10 100 Typ. Max. Unit V A A nA ON (1) Symbol VGS(th) RDS(on) Parameter Gate Threshold Voltage Static Drain-source On Resistance Test Conditions VDS = VGS VGS = 10 V ID = 250 A ID = 70 A Min. 2 0.009 Typ. Max. 4 0.011 Unit V DYNAMIC Symbol gfs (*) Ciss Coss Crss Parameter Forward Transconductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Test Conditions VDS = 20 V ID = 70 A Min. Typ. 50 12600 2100 690 Max. Unit S pF pF pF VDS = 25V, f = 1 MHz, VGS = 0 2/8 STY140NS10 ELECTRICAL CHARACTERISTICS (continued) SWITCHING ON Symbol td(on) tr Qg Qgs Qgd Parameter Turn-on Delay Time Rise Time Total Gate Charge Gate-Source Charge Gate-Drain Charge Test Conditions ID = 70 A VDD = 50 V RG = 4.7 VGS = 10 V (Resistive Load, Figure 1) VDD=50V ID=140A VGS=10V (see test circuit, Figure 2) Min. Typ. 40 150 450 70 170 600 Max. Unit ns ns nC nC nC SWITCHING OFF Symbol td(off) tf Parameter Turn-off Delay Time Fall Time Test Conditions ID = 70 A VDD = 50 V RG = 4.7, VGS = 10 V (Resistive Load, Figure 1) Min. Typ. 465 270 Max. Unit ns ns SOURCE DRAIN DIODE Symbol ISD ISDM (*) VSD (*) trr Qrr IRRM Parameter Source-drain Current Source-drain Current (pulsed) Forward On Voltage Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current ISD = 140 A VGS = 0 Test Conditions Min. Typ. Max. 140 560 1.5 275 2 15 Unit A A V ns C A di/dt = 100A/s ISD = 140 A Vr = 20 V Tj = 150C (Inductive Load, Figure 3) (*)Pulsed: Pulse duration = 300 s, duty cycle 1.5 %. (*)Pulse width limited by safe operating area. Safe Operating Area Thermal Impedance 3/8 STY140NS10 Output Characteristics Transfer Characteristics Transconductance Static Drain-source On Resistance Gate Charge vs Gate-source Voltage Capacitance Variations 4/8 STY140NS10 Normalized Gate Threshold Voltage vs Temperature Normalized on Resistance vs Temperature Source-drain Diode Forward Characteristics Normalized Breakdown Voltage vs Temperature . . 5/8 STY140NS10 Fig. 1: Switching Times Test Circuits For Resistive Load Fig. 2: Gate Charge test Circuit Fig. 3: Test Circuit For Diode Recovery Behaviour 6/8 STY140NS10 Max247 MECHANICAL DATA mm MIN. A A1 b b1 b2 c D e E L L1 4.70 2.20 1.00 2.00 3.00 0.40 19.70 5.35 15.30 14.20 3.70 TYP. MAX. 5.30 2.60 1.40 2.40 3.40 0.80 20.30 5.55 15.90 15.20 4.30 MIN. inch TYP. MAX. DIM. P025Q 7/8 STY140NS10 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is registered trademark of STMicroelectronics (R) 2001 STMicroelectronics - All Rights Reserved All other names are the property of their respective owners. STMicroelectronics GROUP OF COMPANIES Australia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japan - Malaysia - Malta - Morocco Singapore - Spain - Sweden - Switzerland - United Kingdom - U.S.A. http://www.st.com 8/8 |
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